Job Description

Our vision is to transform how the world uses information to enrich life for all .

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence inspiring the world to learn communicate and advance faster than ever.

You will drive physical implementation of advanced highbandwidth memory (HBM) systemonchip (SoC) logic and base die designs from netlist through GDSII within the Heterogeneous Integration Group.
You will collaborate closely with design verification design for test (DFT) packaging and manufacturing teams to deliver bestinclass performance power and area (PPA) with robust signoff collateral.
This is a handson role where you can own blocks or toplevel integration across multiple product generations and see your work through tapeout and silicon.

Job Description

Responsibilities will include but are not limited to:

• Support physical implementation of SoC blocks from floorplanning through placement clock tree synthesis (CTS) routing and optimization to meet performance power and area targets.
• Assist with setup and hold timing closure across multimode multicorner (MMMC) scenarios using industry tools such as PrimeTime or Tempus under guidance of senior engineers.
• Collaborate with RTL design and integration teams to ensure correct clocking reset strategies and power intent implementation throughout the design.
• Integrate and implement complex intellectual property (IP) blocks including controllers interfaces memory builtin selftest (MBIST) design for test (DFT) logic buffers and PHYadjacent logic with focus on timing and physical correctness.
• Run and debug physical signoff checks such as design rule checking (DRC) layout versus schematic (LVS) and timing signoff addressing violations with support from signoff experts.
• Work with DFT teams to ensure scan and MBIST logic are physically clean and do not negatively impact timing congestion or routability.
• Participate in tapeout readiness activities including engineering change order (ECO) flows checklists design reviews and postsilicon debug by correlating silicon behavior with physical design static timing analysis and power analysis.
• Apply handson experience with electronic design automation tools and methodologies while working effectively in a crossfunctional global team environment.

Minimum Qualifications:

• Handson experience with industry electronic design automation tools such as Innovus Fusion Compiler IC Validator (ICV) or Calibre for physical design and signoff.
• Solid understanding of static timing analysis fundamentals clocking concepts and Synopsys Design Constraints (SDC).
• Working knowledge of power intent methodologies including Unified Power Format (UPF) or Common Power Format (CPF) power grid planning and basic power integrity considerations.
• Familiarity with physical verification and signoff flows including design rule checking layout versus schematic and parasitic awareness.
• Experience with hierarchical physical design and systemonchip integration methodologies.

Preferred Qualifications:

• Experience with HBM or dynamic randomaccess memory (DRAM) adjacent SoC designs or memorysubsystemheavy SoCs.
• Bachelors or Masters degree in Electrical Engineering Computer Engineering or a related field or equivalent practical experience.
• Minimum three to five years of experience in a related physical design or SoC implementation role.
• Experience with signal integrity and reliability analysis including IR drop and electromigration using tools such as Ansys.
• Experience developing or using Tcl or Python scripts to automate physical design checks reporting and flow improvements.

As a world leader in the semiconductor industry Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well provide peace of mind and help you prepare for the future. We offer a choice of medical dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury and paid family leave. Additionally Micron benefits include a robust paid time-off program and paid holidays. For additional information regarding the Benefit programs available please see the Benefits Guide posted on

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To learn more about Micron please visit

Micron Prohibits the use of child labor and complies with all applicable laws rules regulations and other international and industry labor standards.

Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.

AI alert : Candidates are encouraged to use AI tools to enhance their resume and/or application materials. However all information provided must be accurate and reflect the candidates true skills and experiences. Misuse of AI to fabricate or misrepresent qualifications will result in immediate disqualification.

Fraud alert: Micron advises job seekers to be cautious of unsolicited job offers and to verify the authenticity of any communication claiming to be from Micron by checking the official Micron careers website in the About Micron Technology Inc.

Required Experience:

Senior IC

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